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Tensilica Inc. was a
company based in
Silicon Valley that
developed semiconductor intellectual property (SIP) cores.
Tensilica was
founded in 1997 by Chris...
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series employs either a
Tensilica Xtensa LX6
microprocessor in both dual-core and single-core variations, an
Xtensa LX7 dual-core microprocessor, or a...
- HS
Intel x86 (32bit)
Renesas RXv1 / RXv2 / RXv3 RISC-V (32bit)
Tensilica Xtensa TI TMS320C667x (DSP)
Operating systems Linux Windows (32bit) Some examples...
- Nios II, OpenRISC, PA-RISC, PowerPC, RISC-V, s390, SuperH, SPARC, x86,
Xtensa Kernel type
Monolithic Userland util-linux by standard,
various alternatively...
- is a
multimedia processor,
incorporates Tensilica Xtensa HiFi 2
Audio Engine (based on the
Xtensa LX
processor licensed in 2005). It can
decode video...
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entirely in hardware. The UVD
technology is
based on the
Cadence Tensilica Xtensa processor,
which was
originally licensed by ATI
Technologies Inc. in 2004...
- HC05/HC08/HC12 8048, 8051, 8085 CP1600 MSP430 AVR8, AVR32
SuperH V850
LoongArch Xtensa IDA Pro JEB
decompiler radare2
Binary Ninja "Releases ยท NationalSecurityAgency/ghidra"...
- multi-operation instructions. The
Xtensa C/C++
compiler can
freely intermix 32- or 64-bit FLIX
instructions with the
Xtensa processor's one-operation RISC...
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module of the ESP8266,
which is a Wi-Fi SoC
integrated with a
Tensilica Xtensa LX106 core,
widely used in IoT
applications (see
related projects). There...
- Sipeed-M1
support AES and SHA256. RISC-V
architecture based ESP32-C (as well as
Xtensa-based ESP32),
support AES, SHA, RSA, RNG, HMAC,
digital signature and XTS...
