- operations; an
example is
libatomic of GCC. The ARM
instruction set
provides LDREX and
STREX instructions which can be used to
implement atomic memory access...
- PowerPC/Power ISA: lwarx/stwcx and ldarx/stdcx MIPS: ll/sc and lld/scd ARM:
ldrex/strex (ARMv6, v7 and v8-M), and ldxr/stxr (ARMv8-A) RISC-V: lr/sc ARC: LLOCK/SCOND...
- unexpected,
since JAXA
tested the
deployment mechanism before with the
LDREX-2 Mission,
which was
launched on 14
October with the
European Ariane 5....
- bits or
bytes within a word, or
other atomic access primitives like the
LDREX/STREX
exclusive access primitives introduced in the ARMv6 architecture....
- Past
Ayame 1 2 DASH
EXPRESS IKAROS Jindai Kiku 1 2 3 4 5 6 7 8
LDREX 1 2 LRE
Micro LabSat-1
Myojo Ohsumi Orizuru RAISE 2 3†
PETSAT RAPIS-1
Ryusei SERVIS-1...
- 600 kg GTO
Success 08 V-138 20
December 2000 00:26 G 508
Astra 2D GE-8
LDREX ~4,700 kg GTO
Success 09 V-140 8
March 2001 22:51 G 509 Eurobird-1 BSAT-2a...
- Past
Ayame 1 2 DASH
EXPRESS IKAROS Jindai Kiku 1 2 3 4 5 6 7 8
LDREX 1 2 LRE
Micro LabSat-1
Myojo Ohsumi Orizuru RAISE 2 3†
PETSAT RAPIS-1
Ryusei SERVIS-1...
- Past
Ayame 1 2 DASH
EXPRESS IKAROS Jindai Kiku 1 2 3 4 5 6 7 8
LDREX 1 2 LRE
Micro LabSat-1
Myojo Ohsumi Orizuru RAISE 2 3†
PETSAT RAPIS-1
Ryusei SERVIS-1...
- Yes Yes Yes Yes Yes Yes Yes Yes Thumb-2 32 SDIV, UDIV, MOVT, MOVW, B.W,
LDREX, LDREXB, LDREXH, STREX, STREXB,
STREXH No Yes Yes Yes Yes Yes Yes Yes Yes...
- Past
Ayame 1 2 DASH
EXPRESS IKAROS Jindai Kiku 1 2 3 4 5 6 7 8
LDREX 1 2 LRE
Micro LabSat-1
Myojo Ohsumi Orizuru RAISE 2 3†
PETSAT RAPIS-1
Ryusei SERVIS-1...
